Detailed Instruction Set
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Procedures And Interrupts
Inputs and Outputs
There are four general purpose registers called AL, BL, CL and DL.
There are three special purpose registers. These are
Flags give information about the outcome of computations performed by the CPU. Single bits in the status register are used as flags. This simulator has flags to indicate the following.
Most real life CPUs have more than four flags.
The registers and their equivalent machine code numbers are shown below.
Register names AL BL CL DL Machine codes 00 01 02 03
Example : To add one to the CL register use the instruction
Assembly Code INC CL Machine Code Hex A4 02 Machine code Binary 10100100 00000010
A4 is the machine instruction for the INC command.
02 refers to the CL register.
The assembler is not case sensitive. mov is the same as MOV and Mov.
Within the simulator, hexadecimal numbers may not have more than two hexadecimal digits.
15, 3C and FF are examples of hexadecimal numbers. When using the assembler, all numbers should be entered in hexadecimal. The CPU window displays the registers in binary, hexadecimal and decimal. Look at the Hexadecimal and Binary page for more detail.
FE is a negative number. Look at the Negative Numbers table for details of twos complement numbers.
In a byte, the left most bit is used as a sign bit. This has a value of minus 128 decimal.
Bytes can hold signed numbers in the range -128 to +127.
Bytes can hold unsigned numbers in the range 0 to 255.
When referring to data in RAM, square brackets are used. For example  refers to the data at address 15hex in RAM.
The same applies to registers. [BL] refers to the data in RAM at the address held in BL. This is important and frequently causes confusion.
These are indirect references. Instead of using the number or the value in the register directly, these values refer to RAM locations. These are also called pointers.
At the mnemonic level, the simulator instructions look very like 80x86 assembly code mnemonics. Sufficient instructions are implemented to permit realistic programming but the full instruction set has not been implemented. All the simulated instructions apply to the low eight bits of the 80x86 CPU. The rest of the CPU has not been simulated.
In the registered version, CALL, RET, INT, IRET and simulated hardware interrupts are available so procedures and interrupts can be written.
Most of the instructions behave as an 80x86 programmer would expect. The MUL and DIV (multiplication and division) commands are simpler than the 80x86 equivalents. The disadvantage of the simulator approach is that overflow is much more probable. The simulator versions of ADD and SUB are realistic.
The 8086 DIV instruction calculates both DIV and MOD in the same instruction. The simulator has MOD as a separate instruction.
The machine codes are quite unlike the 80x86 machine codes. They are simpler, less compact but designed to make the machine code as simple as possible.
With 80x86 machine code, a mnemonic like MOV AL,15 is encoded in two bytes. MOV AL, is encoded into one byte and the 15 goes into another. This means that a lot of different machine OP CODES are needed for all the different combinations of MOV commands and registers.
This simulator needs three bytes. MOV is encoded as a byte sized OP CODE. AL is encoded as a byte containing 00. The 15 goes into a byte as before. This is not very efficient but is very simple.
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© C Neil Bauers 2003